Precision Absolute Value Circuits – TI.com

 

 

®

PRECISION ABSOLUTE VALUE CIRCUITSBy David Jones (520) 746-7696, and Mark Stitt

You can build a precision absolute value circuit using two op
amps and two precision resistors. If you use an op amp and
an IC difference amplifier, no user supplied precision resis-
tors or resistor adjustments are required. Circuits shown are
suitable for precision split supply operation and for single-
supply operation. When used with a rail-to-rail op amp, the
single supply circuit can approach a 0 to 5V full-wave
rectified output from a – 5V input when operating from a
single +5V power supply.

R1

R2

The circuit shown in Figure 1 is a split supply circuit
VOUT
preferred when high input impedance is desired. To under-

D2

C1

A2

D1

VIN

A1

R3

stand how the circuit works, notice that for positive input
signals D1 becomes reverse biased resulting in the active
circuit fragment shown in Figure 2. A1 drives the non-
inverting input of A2 through forward biased diode D2. The
feedback to the inverting inputs of A1 and A2 is from the
output of A2 through resistors R1 and R2. Since no current
flows through resistors R1 or R2, in this condition, VOUT is
precisely equal to VIN.

1

3

4

0V

0V

FIGURE 1. Precision Absolute Value Amplifier has High
Input Impedance and Requires Only Two Matched Resistors.

5V/div 100m s/div

FIGURE 1.2. No Distortion is Visible in the Output Wave-
form of the Figure 1 Circuit When the Input Bandwidth is
Reduced to 2kHz. Other conditions and components are the
same as in Figure 1.1.

0V

0V

R1

R2

D2

A2

VOUT

VIN

A1

5V/div 10m s/div

R3

FIGURE 1.1. The Circuit Shown in Figure 1 Shows Good
Performance at 20kHz with a – 10V Sine Wave Input. The
slight distortion on the leading edge of the rectified output
waveform results from the slew of A1 as it transitions from
forward biasing diode D1 to forward biasing diode D2. This
example uses an OPA2132 high-speed FET input dual op
amp operating from – 15V power supplies.

FIGURE 2. Positive Input Voltages to the Figure 1 Circuit
Result in This Circuit Fragment. The circuit operates as a
precision unity gain voltage follower. No errors are pro-
duced by the forward-biased diode, D2, or the resistors.

©1997 Burr-Brown Corporation

Printed in U.S.A. December, 1997

AB-121
1

SBOA068

When the input voltage to the absolute value amplifier
shown in Figure 1 becomes negative, D2 becomes reverse
biased resulting in the active circuit fragment shown in
Figure 3. A1 drives R1 through forward biased diode D1 to
a voltage equal to VIN. A2, R1, and R2 form a simple unity
gain inverting amplifier. R1 and R2 must be carefully matched
to provide accurate gain = –1V/V to match the +1V/V gain
for a positive input signal. Compensation capacitor C1 en-
sures the circuit is stable with A2 in the feedback loop. For
good stability and best speed, set the C1 • R1 pole equal to
about 1/4 the unity gain bandwidth of A2.

R1

R2

D1

C1

VIN

A1

VOUT

A2

R3

FIGURE 3. Negative Input Voltages to the Figure 1 Circuit
Result in This Circuit Fragment. The circuit operates as a
simple inverting amplifier. Resistors R1 and R2 must be
matched to achieve a precise gain of –1V/V.

You can use a monolithic difference amplifier in place of A2,
R1, and R2 to eliminate expensive matched resistors or
resistor trimming. The circuit using a difference amplifier is
shown in Figure 4.

VIN

A1

DIFFERENCE AMP

5

6

VOUT

A2

2

3

1

R3

FIGURE 4. Building the Figure 1 Circuit With a Precision
Difference Amplifier IC Eliminates the Need for User Sup-
plied Precision Resistors or Resistor Trimming.

The circuit shown in Figure 5 may be preferred for single
supply applications. The previous circuits operate with a
series diode in the signal path. Although feedback eliminates
any error due to the diode, the voltage drop reduces the
potential dynamic range of the circuit by the diode drop
voltage. In the Figure 5 circuit, the diode is not in the signal
path and does not reduce dynamic range. In fact, the Figure
5 circuit can provide full signal range within the limits of the

op amp. Since the inverting amplifier input can operate
below the power supply rail, the circuit can actually accom-
modate negative input voltages!

Figure 5 circuit operation is similar to the previous circuits.
For positive inputs, the diode is reverse biased and has no
influence on the circuit. A2, R1, R2, and R3 operate as a
precision voltage follower as described previously except
that A2 is driven by resistor R3 instead of the forward biased
diode. For this circuit to operate properly, the inputs of A1
must remain high impedance within the entire operating
range of the absolute value circuit. And, of course, the op
amp outputs must swing to the negative power supply rail on
input and output without phase inversion. This condition is
satisfied by many CMOS, JFET, and some bipolar-input op
amps—see op amp recommendation table.

VIN

VOUT

R1

R3

R2

A2

C1

D1

A1

FIGURE 5. This Precision Absolute Value Circuit is Well
Suited for Single-supply Circuits.

0V

0V

2V/div 100m s/div

FIGURE 5.1. The Circuit Shown in Figure 5 Shows Excel-
lent Performance at 2kHz with a – 4V Sine Wave Input. This
example uses an OPA2340 CMOS op amp operating from a
single +5V power supply. Notice that the input range of the
circuit is 4V below the power supply rail.

2

When the input voltage to the absolute value amplifier
shown in Figure 5 becomes negative, the diode is forward
biased holding the non-inverting input of A2 at virtual
ground. A2, R1 and R2 form a simple unity-gain inverting
amplifier as before.

Also, as before, you can use a monolithic difference ampli-
fier in place of A2, R1, and R2 to eliminate the need to
purchase expensive matched resistors or trim resistors. The
circuit using a difference amplifier is shown in Figure 6.

Various op amps and difference amplifiers can be used for
absolute value amplifiers depending on the application.
Table I shows amplifier recommendations for selected appli-
cations.

DIFFERENCE AMP

5

6

A2

VOUT

2

3

1

R3

VIN

A1

FIGURE 6. Building the Figure 5 Circuit With a Precision
Difference Amplifier IC Eliminates the Need for User Sup-
plied Precision Resistors or Resistor Trimming.

0V

0V

0V

0V

5V/div 10m s/div

5V/div 100m s/div

FIGURE 6.2. No Distortion is Visible in the Figure 6 Circuit
When the Input Bandwidth is Reduced to 2kHz. Other
conditions are the same as in Figure 6.1.

FIGURE 6.1. Figure 5 and Figure 6 Circuits Can Also be
Used with Split Supplies with the Advantage of Improving
Dynamic Range by Eliminating the Forward Diode Drop of
the Figure 1 Circuit. However, A2 must recover from satu-
ration to the negative power supply rail before the circuit can
accurately process negative input signals. This example uses
an OPA134 high-speed op amp and an INA134 audio
difference amplifier operating from – 15V power supplies
with a 20kHz – 10V input.

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.

3

i

.
s
r
o
t
s
s
e
r

n
o
s
c
e
r
p

o
n

h
t
i

i

i

w

t
i
u
c
r
i
c

e
v
o
b
A

I

N
Z

h
g
H

i

i

,
n
o
s
c
e
r
P

i

t
s
e
B

t
u
p
n
I

T
E
F

,
r
e
w
o
P
w
o
L

i

.
s
r
o
t
s
s
e
r

n
o
s
c
e
r
p

o
n

h
t
i

i

i

w

t
i
u
c
r
i
c

e
v
o
b
A

t
u
p
n
I

T
E
F

,
d
e
e
p
S

h
g
H

i

i

.
s
r
o
t
s
s
e
r

n
o
s
c
e
r
p

o
n

h
t
i

i

i

w

t
i
u
c
r
i
c

e
v
o
b
A

i

i

s
r
o
t
s
s
e
r

n
o
s
c
e
r
p

o
n

h
t
i

i

w

t
i
u
c
r
i
c

e
v
o
b
A

r
e
w
o
p
o
r
c
M

i

t
s
o
C

t
s
e
w
o
L

i

i

s
r
o
t
s
s
e
r

n
o
s
c
e
r
p

o
n

h
t
i

i

w

t
i
u
c
r
i
c

e
v
o
b
A

l
i

a
R
–
o
t
–
l
i

a
R

,
d
e
e
p
S

h
g
H

i

i

.
s
r
o
t
s
s
e
r

n
o
s
c
e
r
p

o
n

h
t
i

i

i

w

t
i
u
c
r
i
c

e
v
o
b
A

i

.
s
r
o
t
s
s
e
r

n
o
s
c
e
r
p

o
n

h
t
i

i

i

w

s
t
i
u
c
r
i
c

e
v
o
b
A

6

r
o

4

8
1

–
5
3
1

.

V
5

>

S
V

,
t
s
o
C

t
s
e
w
o
L

I

N
Z

h
g
H

i

,
t
s
o
C
w
o
L

I

N
O
T
A
C
L
P
P
A

I

I

T
U
C
R
C

I

E
R
U
G
F

I

1

5

1

4

1

4

1

4

5

6

5

6

5

6

I

T
L
P
S

Y
L
P
P
U
S

)

V

(

8
1

–
5
3
1

.

8
1

–
5
3
1

.

2
2

8
1

–

–

–
3

–
3

8
1

–
5
2
2

.

8
1

–
5
2
2

.

8
1

8
1

–

–

–

5
4

.

–

5
4

.

—

—

—

—

—

—

E
L
G
N
S

I

Y
L
P
P
U
S

6
3
–
7
2

.

6
3
–
7
2

.

)

V

(

—

—

—

—

—

—

—

5

.

5
–
3
2

.

5

.

5
–
7

.

2

.

5
5
–
7
2

.

.

5
5
–
7

.

2

.

5
5
–
7
2

.

.

5
5
–
7

.

2

1
C

)
F
p
(

0
0
1

—

2
2

0
0
1

2
2

2
2

2
2

7
4

2
2

—

—

—

—

—

—

3
R

)

(

k
0
1

k
0
1

k
0
1

k
0
1

k
0
1

k
0
1

k
0
1

k
2

M
1

k
0
0
1

k
0
0
1

k
0
1

k
0
1

k
0
1

2
R

,
1
R

)

(

k
0
1

k
0
1

)
1
(

k
0
1

)
1
(

)
1
(

k
0
1

)
1
(

M
1

)
1
(

k
0
0
1

)
1
(

k
0
1

)
1
(

2
A

1
A

7
3
2
2
A
P
O

2
/
1

7
3
2
2
A
P
O

2
/
1

7
3
2
2
A
P
O

2
/
1

7
3
2
2
A
P
O

2
/
1

2
3
1
A
N

I

7
3
2
A
P
O

7
7
2
2
A
P
O

2
/
1

7
7
2
2
A
P
O

2
/
1

2
3
1
A
N

I

7
7
2
A
P
O

2
3
1
A
N

I

0
3
1
A
P
O

2
3
1
2
A
P
O

2
/
1

2
3
1
2
A
P
O

2
/
1

4
3
1
A
N

I

4
3
1
A
P
O

6
3
3
2
A
P
O

2
/
1

6
3
3
2
A
P
O

2
/
1

2
3
1
A
N

I

6
3
3
A
P
O

7
3
3
2
A
P
O

2
/
1

7
3
3
2
A
P
O

2
/
1

2
3
1
A
N

I

7
3
3
A
P
O

0
4
3
2
A
P
O

2
/
1

0
4
3
2
A
P
O

2
/
1

2
3
1
A
N

I

0
4
3
A
P
O

k
0
0
1

k
0
0
1

0
3
1
2
A
P
O

2
/
1

0
3
1
2
A
P
O

2
/
1

.
r
e

i
f
i
l

p
m
a
e
c
n
e
r
e

f
f
i

d
e
h
t

o
t

l
a
n
r
e
t
n
i

e
r
a

s
r
o
t
s
s
e
r

n
o
s
c
e
r
P

i

i

i

)
1
(

:

E
T
O
N

.
I

E
L
B
A
T

4

W
W
–
–
–
–
–
–
–
–
–
–
–
–
–
–
IMPORTANT NOTICE

Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those
pertaining to warranty, patent infringement, and limitation of liability.

TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.

Customers are responsible for their applications using TI components.

In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.

TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.

Copyright  2000, Texas Instruments Incorporated